LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 458

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 384. USB ULPI viewport register (ULPIVIEWPORT - address 0x4000 7170) bit description
<Document ID>
User manual
Bit
7:0
15:8
23:16
26:24
27
28
Symbol
ULPIDATWR
ULPIDATRD
ULPIADDR
ULPIPORT
ULPISS
-
Remark: WRITES TO THE ULPI THROUGH THE VIEWPORT CAN SUBSTANTIALLY
HARM STANDARD USB OPERATIONS. CURRENTLY NO USAGE MODEL HAS BEEN
DEFINED WHERE SOFTWARE SHOULD NEED TO EXECUTE WRITES DIRECTLY TO
THE ULPI – SEE EXCEPTION REGARDING OPTIONAL FEATURES BELOW.
Remark: EXECUTING READ OPERATIONS THOUGH THE ULPI VIEWPORT SHOULD
HAVE NO HARMFUL SIDE EFFECTS TO STANDARD USB OPERATIONS.
There are two operations that can be performed with the ULPI Viewport, wakeup and read
/write operations. The wakeup operation is used to put the ULPI interface into normal
operation mode and reenable the clock if necessary. A wakeup operation is required
before accessing the registers when the ULPI interface is operating in low power mode,
serial mode, or carkit mode. The ULPI state can be determined by reading the sync. state
bit (ULPISS). If this bit is a one, then ULPI interface is running in normal operation mode
and can accept read/write operations. If the ULPISS indicates a 0 then then read/write
operations will not be able execute. Undefined behavior will result if ULPISS = 0 and a
read or write operation is performed. To execute a wakeup operation, write all 32-bits of
the ULPI Viewport where ULPIPORT is constructed appropriately and the ULPIWU bit is a
1 and ULPIRUN bit is a 0. Poll the ULPI Viewport until ULPIWU is zero for the operation to
complete.
To execute a read or write operation, write all 32-bits of the ULPI Viewport where
ULPIDATWR, ULPIADDR, ULPIPORT, ULPIRW are constructed appropriately and the
ULPIRUN bit is a 1. Poll the ULPI Viewport until ULPIRUN is zero for the operation to
complete. Once ULPIRUN is zero, the ULPIDATRD will be valid if the operation was a
read.
The polling method above could also be replaced and interrupt driven using the ULPI
interrupt defined in the USBSTS and USBINTR registers. When a wakeup or read/write
operation complete, the ULPI interrupt will be set.
Value
0
1
-
Description
When a write operation is commanded, the data to be sent is written
to this field.
After a read operation completes, the result is placed in this field.
When a read or write operation is commanded, the address of the
operation is written to this field.
For the wakeup or read/write operation to be executed, this value
must be written as 0.
ULPI sync state. This bit represents the state of the ULPI interface.
In another state (ie. carkit, serial, low power)
Normal Sync. State.
Reserved
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 21: LPC18xx USB1 Host/Device controller
UM10430
© NXP B.V. 2011. All rights reserved.
Access
R/W
R
R/W
R/W
R
-
458 of 1164
Reset
value
0
0
0
000
0
-