LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 408

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
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User manual
Fig 38. Endpoint queue head data structure
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20.9.1.2 Transfer overlay
20.9.1.3 Current dTD pointer
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BUFFER POINTER PAGE 0
BUFFER POINTER PAGE 1
BUFFER POINTER PAGE 2
BUFFER POINTER PAGE 3
BUFFER POINTER PAGE 4
ENDPOINT CAPABILITIES/CHARACTERISTICS
Total_bytes
CURRENT dTD POINTER
SET-UP BUFFER: BYTES 7:4
SET-UP BUFFER: BYTES 3:0
The seven DWords in the overlay area represent a transaction working space for the
device controller. The general operational model is that the device controller can detect
whether the overlay area contains a description of an active transfer. If it does not contain
an active transfer, then it will not read the associated endpoint.
After an endpoint is readied, the dTD will be copied into this queue head overlay area by
the device controller. Until a transfer is expired, software must not write the queue head
overlay area or the associated transfer descriptor. When the transfer is complete, the
device controller will write the results back to the original transfer descriptor and advance
the queue. See dTD for a description of the overlay fields.
The current dTD pointer is used by the device controller to locate the transfer in progress.
This word is for Device Controller (hardware) use only and should not be modified by DCD
software.
NEXT dTD POINTER
device Queue Head (dQH)
IOC
RESERVED
bit
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All information provided in this document is subject to legal disclaimers.
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Rev. 00.13 — 20 July 2011
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Chapter 20: LPC18xx USB0 Host/Device/OTG controller
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BUFFER POINTER PAGE 0
BUFFER POINTER PAGE 1
BUFFER POINTER PAGE 2
BUFFER POINTER PAGE 3
BUFFER POINTER PAGE 4
Total_bytes
transfer overlay
endpoint transfer descriptor (dTD)
NEXT dTD POINTER
IOC
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© NXP B.V. 2011. All rights reserved.
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