LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 62

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

8.1 How to read this chapter
8.2 General description
<Document ID>
User manual
8.2.1 Active mode
8.2.2 Sleep mode
The power management controller is identical on all LPC18xx parts.
The PMC implements the control sequences to enable transitioning between different
power modes and controls the power state of each peripheral. In addition, wake-up from a
low-power mode based on hardware events is supported.
Low-power modes can be reached from Active mode only, and transitions between
low-power modes are not allowed.
The PMC supports the following low-power modes: Deep-sleep, Power-down, and Deep
power-down. The wake-up from a low-power mode will always result in the Active mode.
The LPC18xx supports five power modes in order from highest to lowest power
consumption:
By default, the LPC18xx is in Active mode, which means that every peripheral can
perform a functional operation at nominal operating conditions. The other low-power
modes are standby modes in which the peripheral clocks are disabled and operating
conditions are adapted to achieve further power savings. The peripheral clocks are
enabled again at wake-up.
In Active (or Sleep mode), three operating modes are supported.
The operating modes are programmable through a power API and through the PMUCON
register in the CREG block (see
In Sleep mode the CPU clock is shut down to save power; the peripherals can still remain
active and fully functional. The Sleep mode is entered by a WFI or WFE instruction if the
SLEEPDEEP bit in the ARM Cortex-M3 system control register is set to 0.
1. Active mode
2. Sleep mode (controlled by the ARM Cortex-M3 core)
3. Deep-sleep mode (controlled by the ARM Cortex-M3 core)
4. Power-down mode (controlled by the ARM Cortex-M3 core)
5. Deep power-down mode
•
•
UM10430
Chapter 8: LPC18xx Power Management Controller (PMC)
Rev. 00.13 — 20 July 2011
Low-power mode: The CPU and core logic operate slower and the core supply
voltage is reduced.
Normal mode: The CPU operates at the nominal supply voltage.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Table
32).
© NXP B.V. 2011. All rights reserved.
User manual
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