NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 117

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5—Intel
5.6.4
5.6.4.1
5.6.4.2
5.6.4.3
5.6.4.4
November 2007
Order Number: 300641-004US
®
6300ESB ICH
Modes of Operation
Fully Nested Mode
In this mode, interrupt requests are ordered in priority from zero through seven, with
zero being the highest. When an interrupt is acknowledged, the highest priority request
is determined and its vector placed on the bus. Additionally, the ISR for the interrupt is
set. This ISR bit remains set until: the processor issues an EOI command immediately
before returning from the service routine; or when in AEOI mode, on the trailing edge
of the second INTA#. While the ISR bit is set, all further interrupts of the same or lower
priority are inhibited, while higher levels will generate another interrupt.
Interrupt priorities may be changed in the rotating priority mode.
Special Fully-Nested Mode
This mode will be used in the case of a system where cascading is used, and the
priority has to be conserved within each slave. In this case, the special fully-nested
mode will be programmed to the master controller. This mode is similar to the fully-
nested mode with the following exceptions:
Automatic Rotation Mode (Equal Priority Devices)
In some applications, there are a number of interrupting devices of equal priority.
Automatic rotation mode provides for a sequential 8-way rotation. In this mode, a
device receives the lowest priority after being serviced. In the worst case, a device
requesting an interrupt will have to wait until each of seven other devices are serviced
at most once.
There are two ways to accomplish automatic rotation using OCW2; the Rotation on
Non-Specific EOI Command (R=1, SL=0, EOI=1) and the rotate in automatic EOI mode
which is set by (R=1, SL=0, EOI=0).
Specific Rotation Mode (Specific Priority)
Software may change interrupt priorities by programming the bottom priority. For
example, when IRQ5 is programmed as the bottom priority device, IRQ6 will be the
highest priority device. The Set Priority Command is issued in OCW2 to accomplish this,
where: R=1, SL=1, and LO-L2 is the binary priority level code of the bottom priority
device.
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OCW3 is sets up ISR/IRR reads, enables/disables the special mask mode (SMM),
and enables/disables polled interrupt mode.
When an interrupt request from a certain slave is in service, this slave is not locked
out from the master's priority logic and further interrupt requests from higher
priority interrupts within the slave will be recognized by the master and will initiate
interrupts to the processor. In the normal-nested mode, a slave is masked out
when its request is in service.
When exiting the Interrupt Service routine, software has to check whether the
interrupt serviced was the only one from that slave. This is done by sending a Non-
Specific EOI command to the slave and then reading its ISR. When it is zero, a non-
specific EOI may also be sent to the master.
Intel
®
6300ESB I/O Controller Hub
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