NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 472

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
Table 368. Offset C0 - C1h: USB_LEGKEY—USB Legacy Keyboard/ Mouse Control
10.1.18 Offset C4h: USB_RES—USB Resume Enable
Table 369. Offset C4h: USB_RES—USB Resume Enable Register (USB—D29:F0/
Intel
DS
472
Bits
Bits
Default Value:
Default Value:
7:2
2
1
0
1
0
®
6300ESB I/O Controller Hub
Note: This register is in the Resume Well.
Device:
Device:
Offset:
Offset:
SMI on Port 60 Writes
SMI on Port 64 Reads
SMI on Port 60 Reads
Enable (60WEN)
Enable (64REN)
Enable (60REN)
Register (USB—D29:F0/F1) (Sheet 3 of 3)
Register (USB—D29:F0/F1)
F1)
Reserved
PORT1EN
PORT0EN
29
C0-C1h
2000h
Name
29
C4h
00h
Name
0 = Disable
1 = A ’1’ in bit 10 will cause an SMI event.
NOTE: If bit 7 of the ETR1 (D31:F0, offset F4h ETR1) is set.
0 = Disable
1 = A ’1’ in bit 9 will cause an SMI event.
NOTE: If bit 7 of the ETR1 (D31:F0, offset F4h ETR1) is set.
0 = Disable
1 = A ’1’ in bit 8 will cause an SMI event.
NOTE: If bit 7 of the ETR1 (D31:F0, offset F4h ETR1) is set.
Reserved.
0 = The USB controller will not look at this port for a wakeup
1 = The USB controller will monitor this port for remote
0 = The USB controller will not look at this port for a wakeup
1 = The USB controller will monitor this port for remote
event.
wakeup and connect/disconnect events
event.
wakeup and connect/disconnect events.
See
Extended Features Register (LPC I/F—D31:F0)”
more information. Port 64 Reads initiated from an
external PCI agent will not set this bit.
See
Extended Features Register (LPC I/F—D31:F0)”
more information. Port 60 Writes initiated from an
external PCI agent will not set this bit.
See
Extended Features Register (LPC I/F—D31:F0)”
more information. Port 60 Reads initiated from an
external PCI agent will not set this bit.
Section 8.1.37, “Offset F4: ETR1—PCI-X
Section 8.1.37, “Offset F4: ETR1—PCI-X
Section 8.1.37, “Offset F4: ETR1—PCI-X
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
0/1
Read/Write
16-bit
0/1
Read/Write
8-bit
Order Number: 300641-004US
Intel
for
for
for
®
6300ESB ICH—10
November 2007
Access
Access
R/W
R/W
R/W
R/W
R/W

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