NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 560

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

13.1.16 Offset 34h: CAP_PTR—Capabilities Pointer
13.1.17 Offset 3Ch: INTR_LN—Interrupt Line Register
Intel
DS
560
Bits
Bits
Default Value:
Default Value:
7:0
7:0
®
Table 475. Offset 34h: CAP_PTR—Capabilities Pointer (Audio—D31:F5)
Table 476. Offset 3Ch: INTR_LN—Interrupt Line Register (Audio—D31:F5)
6300ESB I/O Controller Hub
Lockable:
Lockable:
Note: This register indicates the offset for the capability pointer.
Note: This register indicates which PCI interrupt line is used for the AC’97 module interrupt.
Device:
Device:
Offset:
Offset:
Capability Pointer (CP)
Interrupt Line
(Audio—D31:F5)
(Audio—D31:F5)
The AC’97 interrupt is internally ORed to the interrupt controller with the PIRQ[B]#
signal.
31
34h
50h
No
Name
31
3Ch
00h
No
Name
Indicates that the first capability pointer offset is offset 50h.
This data is not used by the Intel
communicate to software the interrupt line that the interrupt
pin is connected to.
Power Well:
Power Well:
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
®
6300ESB ICH. It is used to
5
Read-Only
8-bit
Core
5
Read/Write
8-bit
Core
Order Number: 300641-004US
Intel
®
6300ESB ICH—13
November 2007
Access
Access
R/W
RO