NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 354

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

8.2.9
Table 228. DMA Master Clear Register
8.2.10
Table 229. DMA_CLMSK—DMA Clear Mask Register
Intel
DS
354
Bits
Bits
Default Value:
Default Value:
7:0
7:0
I/O Address:
I/O Address:
®
6300ESB I/O Controller Hub
Lockable:
Device:
Device:
Clear Mask Register
Master Clear
DMA Master Clear Register
DMA_CLMSK—DMA Clear Mask Register
31
Ch. #0-3 = 0Dh
Ch. #4-7 = DAh
xxxx xxxx
Name
31
Ch. #0-3 = 0Eh;
Ch. #4-7 = DCh
xxxx xxxx
No
Name
No specific pattern. Enabled with a write to the port. This has
the same effect as the hardware Reset. The Command,
Status, Request, and Byte Pointer flip/flop registers are
cleared and the Mask Register is set.
No specific pattern. Command enabled with a write to the
port.
Power Well:
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
0
Write-Only
8-bit
0
Write-Only
8-bit
Core
Order Number: 300641-004US
Intel
®
6300ESB ICH—8
November 2007
Access
Access
WO
WO