NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 638
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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Table 569. Offset 44 - 47h: MBAR—APIC1 Memory Base Register (APIC1—
Intel
DS
638
31:1
11:4
Bits
Default Value:
2:1
2
3
0
®
6300ESB I/O Controller Hub
Lockable:
Device:
Offset:
SI: Space Indicator
PF: Prefetchable
ADDR: Address
LOC: Location
D29:F5)
Reserved
29
44-47h
FEC10000h
No
Name
These bits determine the base address of the I/O APIC1.
Reserved.
Indicates that the BAR is not pre-fetchable.
'00' indicates that the address may be located anywhere in
the 32-bit address space.
Indicates that the BAR is in memory space.
Power Well:
Description
Attribute:
Function:
Size:
5
Read-Only
32-bit
Core
Order Number: 300641-004US
Intel
®
6300ESB ICH—17
November 2007
Access
RO
RO
RO
RO
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