NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 236

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5.18.11.2.3 Debug Software
Intel
DS
236
®
6300ESB I/O Controller Hub
Enabling the Debug Port
There are two mutually exclusive conditions that debug software must address as part
of its startup processing:
Debug software may determine the current ‘initialized’ state of the EHCI by examining
the Configure Flag in the EHCI USB 2.0 Command Register. See
“Offset CAPLENGTH + 40 - 43h: CONFIGFLAG—Configure Flag Register”
regarding offset 40h, bit 0. When this flag is set, then system software has initialized
the EHCI. Otherwise, the EHCI should not be considered initialized. Debug software will
initialize the debug port registers depending on the state the EHCI. However, before
this may be accomplished, debug software must determine which root USB port is
designated as the debug port.
Determining the Debug Port
Debug software may determine which USB root port has been designated as the debug
port by examining bits 20:23 of the EHCI Host Controller Structural Parameters
register. See
Structural Parameters”
the numeric value assigned to the debug port (i.e., 0000=port 0).
Debug Software Startup with Non-Initialized EHCI
3. After sending the token packet, the debug port controller waits for a response from
4. When valid packet was received from the device that was one byte in length
5. When valid packet was received from the device that was more than one byte in
6. When no valid packet is received, then the debug port controller:
1. The EHCI has been initialized by system software
2. The EHCI has not been initialized by system software
the debug device. When a response is received:
(indicating it was a handshake packet), then the debug port controller:
length (indicating it was a data packet), then the debug port controller:
c. USB_ADDRESS_CNT field
d. USB_ENDPOINT_CNT field
e. 5-bit CRC field.
a. The received PID is placed into the RECEIVED_PID_STS field
b. Any subsequent bytes are placed into the DATA_BUFFER
c. The DATA_LEN_CNT field is updated to show the number of bytes that were
a. Resets the ERROR_GOOD#_STS bit
b. Sets the DONE_STS bit
a. Transmits an ACK handshake packet
b. Resets the ERROR_GOOD#_STS bit
c. Sets the DONE_STS bit
a. Sets the EXCEPTION_STS field to 001b
b. Sets the ERROR_GOOD#_STS bit
c. Sets the DONE_STS bit.
received after the PID.
Section 11.2.1.3, “Offset 04 - 07h: HCSPARAMS—Host Controller
for information regarding offset 04h. This 4-bit field represents
Order Number: 300641-004US
Section 11.2.2.8,
Intel
®
for information
6300ESB ICH—5
November 2007