NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 169

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5—Intel
5.12.2
5.12.2.1 Intruder# Signal
5.12.2.2 Pin Straps
5.12.2.3 SMLINK Signals
November 2007
Order Number: 300641-004US
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Note: All mention of “LAN” refers to an external LAN controller.
6300ESB ICH
TCO Signal Usage
This signal may be used to detect the chassis being opened. The activation of this
signal may be used to cause an SMI#, and is reported through the Heartbeat/Event
mechanism. When SMI# is desired, the signal’s level may be read, so this may be used
as a type of General Purpose Input.
Some the TCO functions are decided at powerup (rising edge of PWROK). See
Section 3.21, “Pin Straps”
The Intel
6300ESB ICH supports LAN controllers. A LAN controller can be used to receive or
retrieve TCO message or information on Host SMBus if needed. In Legacy TCO mode
messages will be driven via SMLink. For the Intel
will use SMBus protocol at the rates described in
(D31:F0)”
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Used only after first timeout occurs.
Second timeout allows for system “reset and reboot” when a hardware error is
detected. Various system states are preserved through this special reset to allow
for possible error detection and correction.
Reset associated with “reboot” may attempt to preserve some registers for
diagnostic purposes.
SMI# handler must periodically reload second timer to prevent “reboot” (timeout
during SMI is assumed as broken processor or stuck hardware).
Option to generate limited reset when second timeout occurs.
Ability to detect a “Broken” processor.
Detects when the processor fails to restart after it has been reset.
When processor failure detected, option to pulse a GPIO or send SMBus message.
The SMBus message may be used to indicate to an external LAN controller to send
a distress message. The GPIO may control an LED with optional blink.
Ability to Handle Various Errors (such as ECC Errors) Indicated by MCH.
Can generate SMI# or TCO interrupt.
Intruder Detect input when the system cover is removed.
May generate TCO interrupt or SMI#.
Ability for TCO messages to coexist with standard SMBus devices.
Detection of bad FWH programming. Done by checking that data on the first read is
not FFh.
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for TCO compatible mode.
6300ESB ICH supports TCO compatible mode connectivity. The Intel
for specific assignments of the pin straps.
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Section 5.12, “System Management
6300ESB ICH, messages on this link
Intel
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6300ESB I/O Controller Hub
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