NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 241
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
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Specifications of NHE6300ESB S L7XJ
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5—Intel
Table 119. Write Byte/Word Protocol with PEC
November 2007
Order Number: 300641-004US
®
6300ESB ICH
Read Byte/Word
Reading data is slightly more complicated than writing data. First the Intel
ICH must write a command to the slave device. Then it must follow that command with
a repeated start condition to denote a read from that device's address. The slave then
returns 1 or 2 bytes of data. Software must force the I2C_EN bit to 0 when running this
command.
When programmed for the read byte/word command, the Transmit Slave Address and
Device Command Registers are sent. Data is received into the DATA0 on the read byte,
and the DATA0 and DATA1 registers on the read word. The format of the protocol is
shown in
11–18
20–27
29–36
Bit
10
19
28
37
38
Table 120
Write Byte Protocol
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Data Byte - 8 bits
Acknowledge from Slave
PEC
Acknowledge from Slave
Stop
and
Description
Table
121.
11–18
20–27
29–36
38–45
Bit
10
19
28
37
46
47
Write Word Protocol
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Data Byte Low - 8 bits
Acknowledge from Slave
Data Byte High - 8 bits
Acknowledge from slave
PEC
Acknowledge from slave
Stop
Intel
®
6300ESB I/O Controller Hub
Description
®
6300ESB
241
DS
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