NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 475

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
10—Intel
Table 371. Offset 00 - 01h: USBCMD—USB Command Register (Sheet 2 of 3)
November 2007
Order Number: 300641-004US
Bits
Default Value:
3
Device:
®
Offset:
Enter Global Suspend
6300ESB ICH
Mode (EGSM)
29
00-01h
0000h
Name
0 = Software resets this bit to ’0’ to come out of Global
1 = Host Controller enters the Global Suspend mode. No USB
Suspend mode. Software writes this bit to ’0’ at the same
time that Force Global Resume (bit 4) is written to ’0’ or
after writing bit 4 to 0.
transactions occur during this time. The Host Controller is
able to receive resume signals from USB and interrupt
the system. Software must ensure that the Run/Stop bit
(bit 0) is cleared prior to setting this bit.
Description
Attribute:
Function:
Size:
0/1
Read/Write
16-bit
Intel
®
6300ESB I/O Controller Hub
Access
R/W
475
DS

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