NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 450

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Intel
DS
450
Bits
Default Value:
4
3
2
1
0
®
Table 342. IDE_TIM—IDE Timing Register (IDE—D31:F1) (Sheet 3 of 3)
6300ESB I/O Controller Hub
Drive 1 Fast Timing Bank
Drive 0 Fast Timing Bank
Device:
Drive 0 Prefetch/Posting
Offset:
Drive 0 IORDY Sample
Drive 0 DMA Timing
Point Enable (IE0)
Enable (DTE0)
Enable (PPE0)
(TIME1)
(TIME0)
31
Primary:
Secondary: 42-43h
0000h
Name
40-41h
0 = Accesses to the data port will use compatible timings for
1 = When this bit =’1’ and bit 14 =’0’, accesses to the data
0 = Disable
1 = Enable fast timing mode for DMA transfers only for this
0 = Disable prefetch and posting to the IDE data port for this
1 = Enable prefetch and posting to the IDE data port for this
0 = Disable IORDY sampling is disabled for this drive.
1 = Enable IORDY sampling for this drive.
0 = Accesses to the data port will use compatible timings for
1 = Accesses to the data port will use bits 13:12 for the
this drive.
port will use bits 13:12 for the IORDY sample point, and
bits 9:8 for the recovery time. When this bit =’1’ and bit
14 =’1’, accesses to the data port will use the IORDY
sample point and recover time specified in the slave IDE
timing register.
drive. PIO transfers to the IDE data port will run in
compatible timing.
drive.
drive.
this drive.
IORDY sample point, and bits 9:8 for the recovery time
Description
Attribute:
Function:
Size:
1
Read/Write
16-bit
Order Number: 300641-004US
Intel
®
6300ESB ICH—9
November 2007
Access
R/W
R/W
R/W
R/W
R/W