NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 609

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

15—Intel
15.1.5
15.1.6
November 2007
Order Number: 300641-004US
63:0
Bits
Default Value:
Table 532. Offset 0F0 - 0f7h: Main Counter Value
Note: The letter n may be 0, 1, or 2, referring to Timer 0, 1 or 2.
®
Offset:
COUNTER_VAL[63:0]
6300ESB ICH
Offset 0F0 - 0f7h: Main Counter Value
Timer n Config and Capabilities
0F0-0f7h
N/A
Name
Reads return the current value of the counter. Writes load the
new value to the counter.
NOTES:
1. Software can access the various bytes in this register
2. Writes to this register should only be done while the
3. Reads to this register return the current value of the main
4. 32-bit counters will always return ’0’ for the upper 32 bits
5. If 32-bit software attempts to read a 64-bit counter, it
6. Reads to this register are monotonic. No two consecutive
using 32-bit or 64-bit accesses. 32-bit accesses can be
done to offset 0F0h or 0F4h. 64-bit accesses can be done
to 0F0h. 32-bit accesses must not be done starting at:
0F1h, 0F2h, 0F3h, 0F5h, 0F6h, or 0F7h.
counter is halted.
counter.
of this register.
should first halt the counter. Since this will delay the
interrupts for all of the timers, this should be done only if
the consequences are understood. It is strongly
recommended that 32-bit software only operate the timer
in 32-bit mode.
reads will return the same value. The second of two reads
will always return a larger value (unless the timer has
rolled over to ‘0’).
Description
Attribute:
Size:
Read/Write
64-bit
Intel
®
6300ESB I/O Controller Hub
Access
R/W
609
DS