NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 443

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

9—Intel
9.1.13
9.1.14
November 2007
Order Number: 300641-004US
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command Block.
31:1
15:2
31:1
15:4
Bits
Bits
Default Value:
Default Value:
3:1
6
1
0
6
0
Table 335. Offset 1Ch - 1Fh: SCNL_BAR—Secondary Control Block Base
Table 336. Offset 20h - 23h: BM_BASE—Bus Master Base Address Register
®
Note: The Bus Master IDE interface function uses Base Address register 5 to request a 16-
Device:
Device:
Resource Type Indicator
Resource Type Indicator
Offset:
Offset:
6300ESB ICH
Base Address
Base Address
Offset 1Ch - 1Fh: SCNL_BAR—Secondary Control
Block
Base Address Register (IDE D31:F1)
Address Register (IDE D31:F1)
Offset 20h - 23h: BM_BASE—Bus Master Base
Address Register (IDE—D31:F1)
byte IO space to provide a software interface to the Bus Master functions. Only 12
bytes are actually used (6 bytes for primary, 6 bytes for secondary). Only bits [15:4]
are used to decode the address.
(IDE—D31:F1)
Reserved
Reserved
Reserved
Reserved
31
1Ch - 1Fh
00000001h
Name
31
20h - 23h
00000001h
Name
(RTE)
(RTE)
Reserved.
Base address of the I/O space (4 consecutive I/O locations).
Reserved.
This bit is set to one, indicating a request for IO space.
Reserved.
Base address of the I/O space (16 consecutive I/O locations).
Reserved.
Hardwired to’1’, indicating a request for IO space.
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
1
Read/Write
32-bit
1
Read/Write
32-bit
Intel
®
6300ESB I/O Controller Hub
Access
Access
R/W
RO
RO
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