NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 72

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
3.15
Table 17.
3.16
Table 18.
Intel
DS
72
®
6300ESB I/O Controller Hub
Other Clocks
Other Clocks
Miscellaneous Signals
Miscellaneous Signals
WDT_TOUT#
/ GPIO[32]
RTCRST#
CLK14
CLK48
HICLK
Name
Name
SPKR
Type
Typ
I
I
I
O
O
e
I
Oscillator Clock: Used for 8254 timers. Runs at 14.31818 MHz. This
clock is permitted to stop during S3 (or lower) states in desktop
configurations or S1 (or lower) states in mobile configurations.
48 MHz Clock: Used to run the USB controllers. Runs at 48 MHz. This
clock is permitted to stop during S3 (or lower) states in desktop
configurations or S1 (or lower) states in mobile configurations.
66 MHz Clock: Used to run the Hub Interface. Runs at 66 MHz. This
clock is permitted to stop during S3 (or lower) states in desktop
configurations or S1 (or lower) states in mobile configurations.
Speaker: The SPKR signal is the output of counter 2 and is internally
“ANDed” with Port 61h bit 1 to provide Speaker Data Enable. This signal
drives an external speaker driver device, which in turn drives the
system speaker. Upon PXPCIRST#, its output state is 0.
NOTE: SPKR is sampled at the rising edge of PWROK as a functional
RTC Reset: When asserted, this signal resets register bits in the RTC
well and sets the RTC_PWR_STS bit (bit 2 in GEN_PMCON3 register).
NOTES:
Watchdog Timer Timeout: Driven active to indicate the second stage
of the WDT has overflowed. This signal will toggle states for each
overflow in periodic mode. In non-periodic mode, this signal will go
active low and remain in this state until a system reset or power cycle.
This signal is muxed with GPIO[32].
1. Clearing CMOS in an Intel
2. Unless entering the XOR Chain Test Mode, the RTCRST# input must
done by using a jumper on RTCRST# or GPI, or using SAFEMODE
strap. Implementations should not attempt to clear CMOS by using a
jumper to pull VccRTC low.
always be high when all other RTC power planes are on
strap. See
There is a weak integrated pull-down resistor on SPKR pin.
Section 3.21.1, “Functional Straps”
®
Description
Description
6300ESB ICH-based platform may be
Order Number: 300641-004US
Intel
for more details.
®
6300ESB ICH—3
November 2007

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