NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 21

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Contents—Intel
12
November 2007
Order Number: 300641-004US
11.2
SMBUS Controller Registers
(D31:F3)527
12.1
11.1.19 Offset 59h: Next Item Pointer #2 ........................................................... 496
11.1.20 Offset 5Ah - 5Bh: Debug Port Base Offset................................................ 496
11.1.21 Offset 60h: Serial Bus Release Number ................................................... 496
11.1.22 Offset 61h: Frame Length Adjustment..................................................... 496
11.1.23 Offset 62 - 63h: Port Wake Capability ..................................................... 497
11.1.24 Offset 64 - 65h: Classic USB Override ..................................................... 498
11.1.25 Offset 68 - 6Bh: USB EHCI Legacy Support Extended Capability ................. 499
11.1.26 Offset 6C - 6Fh: USB EHCI Legacy Support Extended Control/Status ........... 500
11.1.27 Offset 70 - 73h: Intel Specific USB EHCI SMI ........................................... 501
11.1.28 Offset 80h: Access Control .................................................................... 503
11.1.29 HS_ Ref_V_USB HS Reference Voltage Register........................................ 503
Memory-Mapped I/O Registers .......................................................................... 503
11.2.1 Host Controller Capability Registers ........................................................ 504
11.2.2 Host Controller Operational Registers ...................................................... 508
11.2.3 USB 2.0-Based Debug Port Register ........................................................ 522
PCI Configuration Registers (SMBUS—D31:F3) .................................................... 527
12.1.1 Offset 00 - 01h: VID—Vendor Identification Register (SMBUS—D31:F3)....... 527
12.1.2 Offset 02 - 03h: DID—Device Identification Register (SMBUS—D31:F3) ....... 528
12.1.3 Offset 04 - 05h: CMD—Command Register
12.1.4 Offset 06 - 07h: STA—Device Status Register
12.1.5 Offset 08h: RID—Revision ID Register (SMBUS—D31:F3) .......................... 529
12.1.6 Offset 09h: PI—Programming Interface (SMBUS—D31:F3)......................... 530
12.1.7 Offset 0Ah: SCC—Sub Class Code Register
12.1.8 Offset 0Bh: BCC—Base Class Code Register
®
6300ESB ICH
11.2.1.1 Offset 00h: CAPLENGTH—Capability Registers Length .................. 504
11.2.1.2 Offset 02 - 03h: HCIVERSION—Host Controller Interface Version
11.2.1.3 Offset 04 - 07h: HCSPARAMS—Host Controller Structural Parameters ..
11.2.1.4 Offset 08 - 0Bh: HCCPARAMS—Host Controller Capability Parameters ..
11.2.2.1 Offset CAPLENGTH + 00 - 03h: USB EHCI CMD—USB
11.2.2.2 Offset CAPLENGTH + 04 - 07h: USB EHCI STS—USB EHCI Status . 512
11.2.2.3 Offset CAPLENGTH + 08 - 0Bh: USB EHCI INTR—USB
11.2.2.4 Offset CAPLENGTH + 0C - 0Fh: FRINDEX—Frame Index ............... 514
11.2.2.5 Offset CAPLENGTH + 10 - 13h: CTRLDSSEGMENT—Control Data
11.2.2.6 Offset CAPLENGTH + 14 - 17h: PERIODICLISTBASE—Periodic Frame
11.2.2.7 Offset CAPLENGTH + 18 - 1Bh: ASYNCLISTADDR—Current
11.2.2.8 Offset CAPLENGTH + 40 - 43h: CONFIGFLAG—Configure Flag Register.
11.2.2.9 PORTSC- Port N Status and Control ........................................... 517
11.2.3.1 Offset 00h: Control/Status Register ........................................... 522
11.2.3.2 Offset 04h: USB PIDs Register .................................................. 525
11.2.3.3 Offset 08h: Data Buffer Bytes 7:0 ............................................. 525
11.2.3.4 Offset 10h: Config Register ...................................................... 526
(SMBUS—D31:F3) ................................................................................ 528
(SMBUS—D31:F3) ................................................................................ 529
(SMBUS—D31:F3) ................................................................................ 530
(SMBUS—D31:F3) ................................................................................ 530
Number505
505
507
EHCI Command Register.......................................................... 509
EHCI Interrupt Enable ............................................................. 514
Structure Segment Register ..................................................... 515
List Base Address.................................................................... 516
Asynchronous List Address ....................................................... 516
517
Intel
®
6300ESB I/O Controller Hub
DS
21