NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 422
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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Compliant
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8.9.8
Table 308. TCO1_CNT—TCO1 Control Register
Intel
DS
422
15:1
Bits
Default Value:
7:0
12
11
10
I/O Address:
3
9
8
®
6300ESB I/O Controller Hub
Lockable:
Device:
TCO_TMR_HLT: TCO
NMI2SMI_EN
SEND_NOW
TCO_LOCK
Timer Halt
NMI_NOW
TCO1_CNT—TCO1 Control Register
Reserved
Reserved
31
TCOBASE +08h
0000h
No
Name
Reserved.
0 = This bit defaults to 0. A core-well reset is required to
1 = Prevents writes from changing the TCO_EN bit (in offset
0 = The TCO Timer is enabled to count.
1 = The TCO Timer will halt. It will not count, and thus cannot
0 = The Intel
1 = Writing a 1 to this bit will cause the Intel
0 = Normal NMI functionality.
1 = Forces all NMIs to instead cause SMIs. The functionality
NMI_ENGBL_SMI_ENDescription
0
0
1
1
0 = This bit is cleared by writing a 1 to the bit position. The
1 = Writing a 1 to this bit causes an NMI. This allows the
Reserved.
change this bit from 1 to 0.
30h of Power Management I/O space). Once this bit is set
to 1, it can not be cleared by software writing a 0 to this
bit location.
reach a value that will cause an SMI# or set the
SECOND_TO_STS bit. When set, this bit will prevent
rebooting and prevent Alert On LAN event messages from
being transmitted on the SMLINK (but not Alert On LAN*
heartbeat messages).
completed sending the message. Software must NOT set
this bit to 1 again until the Intel
back to 0.
to send an Event message with the Software Event bit
set.
of this bit is dependent upon the settings of the NMI_EN
bit and the GBL_SMI_EN bit as detailed in the following
table:
NMI handler is expected to clear this bit. Another NMI will
not be generated until the bit is cleared.
BIOS or SMI handler to force an entry to the NMI handler.
0
1
0
1
®
No SMI# at all because GBL_SMI_EN = 0
SMI# will be caused due to NMI events
No SMI# at all because GBL_SMI_EN = 0
No SMI# due to NMI because NMI_EN = 1
6300ESB ICH will clear this bit when it has
Power Well:
Description
Attribute:
Function:
Size:
®
0
Read-Only, Read/Write Clear
16-bit
Core
6300ESB ICH has set it
®
6300ESB ICH
Order Number: 300641-004US
Intel
®
6300ESB ICH—8
November 2007
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