NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 815

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
22—Intel
Table 730. PCI-X Measurement Condition Parameters
Figure 43. PCI-X RST# Timing for switching to PCI-X Mode Pull-ups
22.5.2
Figure 44. Clock Timing
November 2007
Order Number: 300641-004US
®
6300ESB ICH
System Clocks and General Timing
Vth
Vtl
Vtest
Vrise
Vtfall
Vmax
Input Signal Slew Rate
NOTES:
1. The test for the 3.3V environment is done with 0.1*V
2. V
3. Input signal slew rate in PCI-X mode is measured between V
DEVSEL#
PCI_CLK
FRAME#
TRDY#
STOP#
IRDY#
RST#
maximum peak-to-peak waveform allowed for measuring input timing. Production testing is
permitted to use different voltage values but must correlate results back to these
parameters.
trise
and V
Symbol
tfall
are reference voltages for timing measurements only.
0.8V
High Time
2.0V
Fall Time
T_rlcx
0.285 Vcc
0.615 Vcc
0.25 Vcc
0.6 Vcc
0.4 Vcc
0.4 Vcc
Value
1.5
Period
T_prsu
Low Time
T_rst(ref)
cc
of overdrive. V
T_rst_clk(ref)
il
Units
V/ns
and V
V
V
V
V
V
V
Intel
Rise Time
®
ih
.
6300ESB I/O Controller Hub
max
specifies the
T_prh
T_rhff(ref)
Notes
1
1
2
2
1
3
815
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