NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 744

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
20.1.9
20.1.10 Offset 14h - 17h: PCNL_BAR—Primary Control
Intel
DS
744
31:1
15:3
31:1
Bits
Bits
15:2
Default Value:
Default Value:
2:1
6
0
6
1
0
®
Table 669. Offset 10h - 13h: PCMD_BAR—Primary Command Block Base
Table 670. Offset 14h - 17h: PCNL_BAR—Primary Control Block Base Address
6300ESB I/O Controller Hub
Note: This 8-byte I/O space is used in native mode for the Primary Controller’s Command
Note: This 4-byte I/O space is used in native mode for the Primary Controller’s Control Block.
Device:
Device:
Resource Type Indicator
Resource Type Indicator
Offset:
Offset:
Base Address
Base Address
Offset 10h - 13h: PCMD_BAR—Primary Command
Block
Base Address Register (SATA–D31:F2)
Block.
Address Register (SATA–D31:F2)
Block Base
Address Register (SATA–D31:F2)
Register (SATA–D31:F2)
Reserved
Reserved
Reserved
Reserved
31
10h-13h
00000001h
Name
31
14h-17h
00000001h
Name
(RTE)
(RTE)
Reserved.
Base address of the I/O space (8 consecutive I/O locations).
Reserved.
This bit is set to ‘1’, indicating a request for IO space.
Reserved.
Base address of the I/O space (4 consecutive I/O locations).
Reserved.
This bit is set to ‘1’, indicating a request for IO space.
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
2
Read/Write
32-bit
2
Read/Write
32-bit
Order Number: 300641-004US
Intel
®
6300ESB ICH—20
November 2007
Access
Access
R/W
R/W
RO
RO

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