NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 382

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

8.7.2
Table 267. NMI_EN—NMI Enable (and Real Time Clock Index)
8.7.3
Table 268. PORT92—Fast A20 and Init Register
Intel
DS
382
Bits
Bits
Default Value:
Default Value:
6:0
7:2
7
1
0
i/O Address:
i/O Address:
®
6300ESB I/O Controller Hub
Lockable:
Lockable:
Note: The RTC Index field is write-only for normal operation. This field may only be read in
Device:
Device:
RTC_INDX: Real Time
NMI_EN: NMI Enable
Clock Index Address
Alternate A20 Gate
ALT_A20_GATE:
INIT_NOW
NMI_EN—NMI Enable (and Real Time Clock Index)
Alt-Access Mode. This register is aliased to Port 74h, and all bits are readable at that
address.
PORT92—Fast A20 and Init Register
Reserved
31
70h
80h
No
Name
31
92h
00h
No
Name
0 = Enable NMI sources.
1 = Disable All NMI sources.
This data goes to the RTC to select which register or CMOS
RAM address is being accessed.
Reserved.
This bit is ORed with the A20GATE input signal to generate
A20M# to the processor.
0 = A20M# signal may potentially go active.
1 = This bit is set when INIT# goes active.
When this bit transitions from a 0 to a 1, the Intel
ICH will force INIT# active for 16 PCI clocks.
Power Well:
Power Well:
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
0
Read/Write (Special)
8-bit
Core
0
Read/Write
8-bit
Core
®
Order Number: 300641-004US
6300ESB
Intel
®
6300ESB ICH—8
November 2007
Access
Access
R/W
R/W
R/W
R/W