NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 667

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

18—Intel
18.6.1.19Offset 34: CAPP—Capabilities List Pointer
18.6.1.20Offset 3C: INTR—Interrupt Information
18.6.1.21Offset 3E: BCTRL—Bridge Control
November 2007
Order Number: 300641-004US
07:0
15:0
07:0
Bits
Bits
0
8
0
Table 602. Offset 34: CAPP—Capabilities List Pointer
Table 603. Offset 3C: INTR—Interrupt Information
Note: Contains the pointer for the first entry in the capabilities list.
Note: This register contains information on interrupts on the bridge.
Note: This register provides extensions to the Command register that are specific to a bridge.
ities Pointer
Line (LINE)
®
Device
Device
Offset
Offset
Interrupt
Pin (PIN)
Interrupt
Capabil-
6300ESB ICH
Name
Name
(PTR)
The Bridge Control register provides many of the same controls for the secondary
interface that are provided by the Command register for the primary interface. Some
bits affect operation of both interfaces of the bridge.
28
34
28
3C
Indicates that the pointer for the first entry in the capabilities
list is at 50h in configuration space.
Bridges do not support the generation of interrupts.
The Intel
so this is reserved as 00h.
®
6300ESB ICH Bridge does not generate interrupts,
Description
Description
Attribute:
Attribute:
Function
Function
Size:
Size:
0
Read-Only
8-bit
0
Read-Only
16-bit
Intel
®
Reset
Value
Reset
Value
6300ESB I/O Controller Hub
50h
00h
00h
Access
Access
RO
RO
RO
667
DS