NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 551

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
13—Intel
13.1.1
13.1.2
November 2007
Order Number: 300641-004US
15:0
15:0
Bits
Bits
Default Value:
Default Value:
Table 460. Offset 00 - 01h: VID—Vendor Identification Register (Audio—
Table 461. Offset 02 - 03h: DID—Device Identification Register (Audio—
Lockable:
Lockable:
Device:
Device:
®
Offset:
Offset:
6300ESB ICH
Vendor ID Value
Device ID Value
Core Well registers not reset by the D3
Resume Well registers will not be reset by the D3
Offset 00 - 01h: VID—Vendor Identification
Register (Audio—D31:F5)
D31:F5)
Offset 02 - 03h: DID—Device Identification
Register (Audio—D31:F5)
D31:F5)
31
00-01h
8086h
No
Name
31
02-03h
25A6h
No
Name
Offset 2Ch-2Dh – Subsystem Vendor ID (SVID)
Offset 2Eh-2Fh – Subsystem ID (SID)
Offset 40h – Programmable Codec ID (PCID)
Offset 41h – Configuration (CFG)
Offset 54h-55h – Power Management Control and Status (PCS)
Bus Mastering Register: Global Status Register, bit[17:16]
Bus Mastering Register: SDATA_IN MAP register, bit[7:3]
This is a 16-bit value assigned to Intel.
Power Well:
Power Well:
Description
Description
HOT
Attribute:
Attribute:
Function:
Function:
to D0 transition:
Size:
Size:
HOT
5
Read-Only
16-bit
Core
5
Read-Only
16-bit
Core
to D0 transition:
Intel
®
6300ESB I/O Controller Hub
Access
Access
RO
RO
551
DS

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