NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 557
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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13—Intel
13.1.12 Offset 18 - 1Bh: MMBAR—Mixer Base Address
November 2007
Order Number: 300641-004US
31:1
15:6
31:9
Bits
Bits
Default Value:
Default Value:
5:1
6
0
Table 470. Offset 14 - 17h: NABMBAR—Native Audio Bus Mastering Base
Table 471. Offset 18 - 1Bh: MMBAR—Mixer Base Address Register (Audio—
Lockable:
Lockable:
Device:
Device:
®
Resource Type Indicator
Offset:
Offset:
6300ESB ICH
Base Address
Base Address
Address Register (Audio—D31:F5)
Register (Audio—D31:F5)
This BAR creates 512 bytes of memory space to signify the base address of the register
space. The lower 256 bytes of this space map to the same registers as the 256-byte I/
O space pointed to by NAMBAR. The lower 384 bytes are divided as follows:
D31:F5) (Sheet 1 of 2)
Reserved
Reserved
•
•
•
•
31
14-17h
00000000h
No
Name
31
18-1Bh
00000000h
No
Name
(RTE)
128 bytes for the primary codec (offsets 00 – 7Fh)
128 bytes for the secondary codec (offsets 80h – FFh)
128 bytes for the tertiary codec (offsets 100h – 17Fh).
128 bytes of reserved space (offsets 180h – 1FFh), returning all ‘0’.
Reserved. Hardwired to ‘0’.
These bits are used in the I/O space decode of the Native
Audio Bus Mastering interface registers. The number of upper
bits that a device actually implements depends on how much
of the address space the device will respond to. For AC’97 bus
mastering, the upper 16 bits are hardwired to ‘0’, while bits
15:6 are programmable. This configuration yields a maximum
I/O block size of 64 bytes for this base address.
Reserved. Read as ‘0’s.
This read-only bit defaults to ’0’ and flips to ’1’ if bit ’0’ of
offset 41h is set. When this bit is set to ‘1’, it indicates a
request for I/O space.
Lower 32 bits of the 512-byte memory offset to use for
decoding the primary, secondary, and tertiary codec’s mixer
spaces.
Power Well:
Power Well:
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
5
Read/Write
32-bit
Core
5
Read/Write
32-bit
Core
Intel
®
6300ESB I/O Controller Hub
Access
Access
R/W
R/W
RO
557
DS
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