NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 623

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

16—Intel
Table 546. Offset 0Eh: HEDT—Header Type Register
16.4.12 Offset 10h: BAR—Base Address Register
Table 547. Offset 10h: BAR—Base Address Register
16.4.13 Offset 2Dh - 2Ch: SVID—Subsystem Vendor ID
November 2007
Order Number: 300641-004US
31:4
Bits
Bits
Default Value:
Default Value:
7:0
2:1
3
0
Lockable:
Lockable:
Note: Software (BIOS) will write the value to this register. After that, the value may be read,
Device:
Device:
®
Offset:
Offset:
RTE - Resource Type
6300ESB ICH
Base Address
Header Type
Prefetchable
but writes to the register will have no effect. The write to this register should be
combined with the write to the SID to create one 32-bit write.
Indicator
29
0Eh
00h
No
Name
29
10h
00000000h
No
Name
Type
These bits are used to determine the size of the memory-
mapped region being requested.
Hard-wired to ‘0’, indicating that this range is not pre-
fetchable.
Hard-wired to ‘00’, indicating that this range can be mapped
anywhere in 32-bit address space.
Hard-wired to ‘0’, indicating a request for memory space.
Power Well:
Power Well:
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
4
Read-Only
8-bit
Core
4
Read-Write
32-bit
Core
Intel
®
6300ESB I/O Controller Hub
Access
Access
R/W
RO
RO
RO
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