NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 330
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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8.1.24
Table 204. Offset D5h: BACK_CNTL—Backed Up Control (LPC I/F—D31:F0)
Intel
DS
330
Bits
Default Value:
3:0
7
6
5
4
®
6300ESB I/O Controller Hub
Lockable:
Device:
FREQ_STRAP[3:0]: CPU
Offset:
CPU_BIST_EN: Enables
TOP_SWAP: Top-Block
Frequency Strap
Swap Mode
Offset D5h: BACK_CNTL—Backed Up Control
(LPC I/F—D31:F0)
CPU BIST
Reserved
Reserved
31
D5h
0Fh (upon RTCRST# assertion
low)
2Fh (TOP_SWAP strap active)
No
Name
Reserved.
Reserved.
0 = The Intel
1 = The Intel
NOTE: If the Intel
0 = Disable.
1 = The INIT# signal will be driven active when CPURST# is
NOTE: This bit is in the Resume well and is reset by
These bits determine the internal frequency multiplier of the
processor. These bits may be reset to 1111 based on an
external pin strap or through the RTCRST# input signal.
Software must program this field based on the processor’s
specified frequency. Note that this field is only writable when
the SAFE_MODE bit is cleared to zero, and SAFE_MODE is
only cleared by PWROK rising edge. These bits are in the RTC
well.
automatically set to 0 by RTCRST#, but not by any other
type of reset.
to the BIOS space in the FWH (but not for cycles to the
Feature Space in the FWH).
active. INIT# will go inactive with the same timings as
the other CPU I/F signals (Hold Time after CPURST#
inactive). Note that CPURST# is generated by the
memory controller hub, but the Intel
a Hub Interface special cycle that allows the Intel
6300ESB ICH to control the assertion/deassertion of
CPURST#.
(SIU0_DTR# is low at rising edge of PWROK), then
this bit CANNOT be cleared by software. The strap
jumper should be removed and the system rebooted.
RSMRST#, but not by PXPCIRST# nor CF9h writes.
®
®
6300ESB ICH will not invert A16. This bit is
6300ESB ICH will invert A16 for cycles going
®
6300ESB ICH is strapped for Top-Swap
Power Well:
Description
Attribute:
Function:
Size:
0
Read/Write
8-bit
RTC
®
6300ESB ICH has
Order Number: 300641-004US
®
Intel
®
6300ESB ICH—8
November 2007
Access
R/W
R/W
R/W
RO
RO
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