NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 361

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

8—Intel
Table 237. PIC Registers
8.4.2
Table 238. ICW1—Initialization Command Word 1 Register
November 2007
Order Number: 300641-004US
Bits
Default Value:
7:5
4
3
2
1
0
®
Device:
Offset:
Edge/Level Bank Select
6300ESB ICH
ICW4 Write Required
Single or Cascade
ICW/OCW select
ICW/OCW select
ICW1—Initialization Command Word 1 Register
A write to Initialization Command Word 1 starts the interrupt controller initialization
sequence, during which the following occurs:
Once this write occurs, the controller expects writes to ICW2, ICW3, and ICW4 to
complete the initialization sequence.
1. The Interrupt Mask register is cleared.
2. IRQ7 input is assigned priority 7.
3. The slave mode address is set to 7.
4. Special mask mode is cleared and Status Read is set to IRR.
(SNGL)
(LTIM)
31
Master Controller - 020h
Slave Controller - 0A0h
All bits undefined
Name
(IC4)
4D0h
4D1h
Port
ADI
A1h
ADh, B1h,
A5h, A9h,
B5h, B9h,
Aliases
BDh
-
-
These bits are MCS-85 specific, and not needed.
000 = Should be programmed to “000”
1 = This bit must be a 1 to select ICW1 and enable the ICW2,
ICW3, and ICW4 sequence.
Disabled. Replaced by the edge/level triggered control
registers (ELCR).
0 = Ignored for the Intel
programmed to 0.
0 = Must be programmed to a 0 to indicate two controllers
operating in cascade mode.
1 = This bit must be programmed to a 1 to indicate that ICW4
needs to be programmed.
Slave PIC ICW2 Init. Cmd Word 2
Register
Slave PIC ICW3 Init. Cmd Word 3
Register
Slave PIC ICW4 Init. Cmd Word 4
Register
Slave PIC OCW1 Op Ctrl Word 1 Register
Master PIC Edge/Level Triggered
Register
Slave PIC Edge/Level Triggered Register
Register Name/Function
Description
®
Attribute:
Function:
6300ESB ICH. Should be
Size:
0
Write-Only
8-bit
Intel
®
Undefined
Undefined
Default
6300ESB I/O Controller Hub
Value
01h
00h
00h
00h
Access
WO
WO
WO
WO
WO
WO
Type
R/W
R/W
R/W
WO
WO
WO
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