NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 410

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
8.8.3.11 ALT_GP_SMI_EN—Alternate GPI SMI Enable Register
Table 294. ALT_GP_SMI_EN—Alternate GPI SMI Enable Register
Intel
DS
410
15:0
Bits
Default Value:
I/O Address:
®
6300ESB I/O Controller Hub
Lockable:
Note: Usage: ACPI or Legacy.
Device:
31
PMBASE +38h
0000h
No
Name
These bits are used to enable the corresponding GPIO to
cause an SMI#. In order for these bits to have any effect, the
following must be true.
• The corresponding bit in the ALT_GP_SMI_EN register is
• The corresponding GPI must be routed in the GPI_ROUT
• The corresponding GPIO must be implemented.
set.
register to cause an SMI.
Power Well:
Description
Attribute:
Function:
Size:
0
Read/Write
16-bit
Resume
Order Number: 300641-004US
Intel
®
6300ESB ICH—8
November 2007
Access

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