NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 391
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
Lead Free Status / RoHS Status
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8—Intel
Table 278. Offset C4h, C6h, C8h, CAh: MON[n]_TRP_RNG—I/O Monitor [4:7] Trap
8.8.1.8
Table 279. Offset CCh: MON_TRP_MSK—I/O Monitor Trap Range Mask Register
November 2007
Order Number: 300641-004US
15:0
15:1
11:8
Bits
Bits
Default Value:
Default Value:
7:4
3:0
2
Lockable:
Lockable:
®
Note: Usage: Legacy Only.
Device:
Device:
Offset:
Offset:
6300ESB ICH
MON[n]_TRAP_BASE
MON7_MASK
MON6_MASK
MON5_MASK
MON4_MASK
to the intended target and an SMI# will be generated (this is the same functionality as
the Intel
6300ESB ICH and the intended target is on LPC, an SMI# will be generated but the
cycle will only be forwarded to the intended target when forwarding to LPC is enabled
through the TRP_FWD_EN register settings.
Range
Register for Devices 4-7 (PM—D31:F0)
Offset CCh: MON_TRP_MSK—I/O Monitor Trap Range Mask
Register
for Devices 4-7 (PM—D31:F0)
for Devices 4-7 (PM—D31:F0)
31
C4h, C6h, C8h, CAh
0000h
No
Name
31
CCh
00h
No
Name
®
6300ESB ICH component). When the cycle is to be claimed by the Intel
Base I/O locations that MON[n] traps (where n = 4, 5, 6 or
7). The range may be mapped anywhere in the CPU I/O space
(0-64K).
Any access to the range will generate an SMI# when enabled
by the associated DEV[n]_TRAP_EN bit in the MON_SMI
register (PMBASE +40h).
Selects low 4-bit mask for the I/O locations that MON7 will
trap. Similar to MON4_MASK.
Selects low 4-bit mask for the I/O locations that MON6 will
trap. Similar to MON4_MASK.
Selects low 4-bit mask for the I/O locations that MON5 will
trap. Similar to MON4_MASK.
Selects low 4-bit mask for the I/O locations that MON7 will
trap. When a mask bit is set to a 1, the corresponding bit in
the base I/O selection will not be decoded.
For example, if MON4_TRAP_BASE = 1230h, and MON4_MSK
= 0100b, the Intel
1234h for Monitor 4.
®
6300ESB ICH will decode 1230h and
Power Well:
Power Well:
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
0
Read/Write
16-bit
Core
0
Read/Write
16-bit
Core
Intel
®
6300ESB I/O Controller Hub
Access
Access
R/W
R/W
R/W
R/W
R/W
®
391
DS
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