NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 230
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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5.18.9
Figure 22. Intel
5.18.9.1 Port-Routing Logic
Intel
DS
230
®
6300ESB I/O Controller Hub
Interaction with Classic Host Controllers
The Enhanced Host Controller shares the four USB ports with two UHCI Host Controllers
in the Intel
and the USB UHCI Controller at D29:F1 shares ports 2 and 3 with the EHCI Controller.
There is very little interaction between the USB EHCI and the USB UHCI controllers
other than the muxing control which is provided as part of the EHCI Controller.
Figure 22
indicates all of the logic that is part of the Enhanced Host Controller cluster.
Integrated into the EHC functionality is port-routing logic, which performs the muxing
between the USB UHCI and USB EHCI host controllers. The Intel
conceptually implements this logic as described in Section 4.2 of the EHCI
Specification. When a device is connected that is not capable of USB 2.0’s High-Speed
signaling protocol or when the EHCI software drivers are not present as indicated by
the Configured Flag, the USB UHCI Controller owns the port. Owning the port means
that the differential output is driven by the owner and the input stream is only visible to
the owner. The host controller that is not the owner of the port internally sees a
disconnected port.
Note that the port-routing logic is the only block of logic within the Intel
that observes the physical (real) connect/disconnect information. The port status logic
inside each of the host controllers observes the electrical connect/disconnect
information that is generated by the port-routing logic.
Only the differential signal pairs are muxed/demuxed between the USB UHCI and USB
EHCI host controllers. The other USB functional signals are handled as follows: The
overcurrent inputs (OC#[3:0]) are directly routed to both controllers. An overcurrent
event is recorded in both controllers’ status registers.
The Port-Routing logic is implemented in the Suspend power well so that re-
enumeration and remapping of the USB ports is not required following entering and
exiting a system sleep state in which the core power is turned off.
®
6300ESB ICH-USB Port Connections
depicts the USB Port Connections at a conceptual level. The dashed rectangle
®
6300ESB ICH. The USB UHCI Controller at D29:F0 shares ports 0 and 1
Port 3
Port 2
Port 1
Port 0
Debug
Port
EHCI (D29:F7)
(D29:F1)
UHCI #2
UHCI #1
(D29:F0)
Order Number: 300641-004US
®
6300ESB ICH
Intel
®
®
6300ESB ICH—5
6300ESB ICH
November 2007
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