NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 278

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

6.3
6.3.1
Table 143. Fixed I/O Ranges Decoded by Intel
Intel
DS
278
®
6300ESB I/O Controller Hub
Note: Unclaimed PCI cycles will be subtractively decoded and forwarded to the LPC.
In addition to reserved bits within a register, the configuration space contains reserved
locations. Software should not write to reserved PCI configuration locations in the
device-specific region (above address offset 3Fh).
I/O Map
The I/O map is divided into Fixed and Variable address ranges. Fixed ranges cannot be
moved, but in some cases may be disabled. Variable ranges may be moved and may
also be disabled.
Fixed I/O Address Ranges
Table 143
each I/O range, there may be separate behavior for reads and writes. The Hub
Interface cycles that go to target ranges that are marked as “Reserved” will not be
decoded by the Intel
targets one of the fixed I/O target ranges, it will be positively decoded by the Intel
6300ESB ICH in medium speed.
Address ranges that are not listed or marked “Reserved” are NOT decoded by the
Intel
(Sheet 1 of 3)
NOTES:
1. Only when the Port 61 Alias Enable bit (Device 31:Function 0, Offset D0, Bit 4) bit is set.
2. Only when IDE Standard I/O space is enabled for Secondary Channel and the IDE Controller
3. Only when IDE Standard I/O space is enabled for Primary Channel and the IDE Controller is
4. Should forward read cycles to this address to LPC Variable I/O Decode Ranges.
2Ch - 2Dh
00h - 08h
09h - 0Eh
10h - 18h
19h - 1Eh
20h - 21h
24h - 25h
28h - 29h
30h - 31h
34h - 35h
Address
Otherwise, the target is PCI.
is in legacy mode. Otherwise, the target is PCI.
in legacy mode. Otherwise, the target is PCI.
2E-2F
®
I/O
0Fh
1Fh
6300ESB ICH (unless assigned to one of the variable ranges).
shows the Fixed I/O decode ranges from the CPU perspective. Note that for
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
®
DMA Controller
DMA Controller
DMA Controller
DMA Controller
Read Target
6300ESB ICH, and will be passed to PCI. When a PCI master
Reserved
Reserved
LPC SIO
®
6300ESB I/O Controller Hub
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
Write Target
LPC SIO
Order Number: 300641-004US
Intel
Forwarded to LPC
®
Internal Unit
6300ESB ICH—6
Interrupt
Interrupt
Interrupt
Interrupt
Interrupt
Interrupt
November 2007
DMA
DMA
DMA
DMA
DMA
DMA
®