NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 358

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Table 234. LTCH_CMD—Counter Latch Command
8.3.2
Intel
DS
358
Bits
7:6
5:4
3:0
®
6300ESB I/O Controller Hub
Note: Each counter's status byte may be read following a Read Back Command. When latch
Counter Latch Command 00 = Selects the Counter Latch Command.
Device:
Counter Selection
SBYTE_FMT—Interval Timer Status Byte Format
Register
status is chosen (bit 4=0, Read Back Command) as a read back option for a given
counter, the next read from the counter's Counter Access Ports Register (40h for
counter 0, 41h for counter 1, and 42h for counter 2) returns the status byte. The status
byte returns the following:
Reserved
31
Name
These bits select the counter for latching. When “11” is
written, the write is interpreted as a read back command.
00 = Counter 0
01 = Counter 1
10 = Counter 2
Reserved. Must be 0.
Description
Attribute:
Function:
Size:
0
Read-Only
8-bit
Order Number: 300641-004US
Intel
®
6300ESB ICH—8
November 2007
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