NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 532
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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12.1.11 Offset 2Eh - 2Fh: SID—Subsystem ID (SMBUS—
12.1.12 Offset 3Ch: INTR_LN—Interrupt Line Register
12.1.13 Offset 3Dh: INTR_PN—Interrupt Pin Register
Intel
DS
532
15:0
Bits
Bits
Bits
Default Value:
Default Value:
Default Value:
7:0
7:0
®
Table 435. Offset 2Eh - 2Fh: SID—Subsystem ID (SMBUS—D31:F2/F4)
Table 436. Offset 3Ch: INTR_LN—Interrupt Line Register (SMBUS—D31:F3)
Table 437. Offset 3Dh: INTR_PN—Interrupt Pin Register (SMBUS—D31:F3)
6300ESB I/O Controller Hub
Lockable:
Device:
Device:
Device:
Offset:
Offset:
Offset:
Subsystem ID (SID)
Interrupt line
Interrupt PIN
D31:F2/F4)
(SMBUS—D31:F3)
(SMBUS—D31:F3)
31
2Eh-2Fh
0000h
No
Name
31
3Ch
00h
Name
31
3Dh
02h
Name
The SID register, in combination with the SVID register,
enables the operating system (OS) to distinguish subsystems
from each other. The value returned by reads from this
register is the same as that which was written by BIOS into
the IDE_SID register.
This data is not used by the Intel
communicate to software that the interrupt line is connected
to PIRQB#.
02h = Indicates that the Intel
Controller will drive PIRQB# as its interrupt line.
Power Well:
Description
Description
Description
Attribute:
Attribute:
Attribute:
Function:
Function:
Function:
®
Size:
Size:
Size:
6300ESB ICH SMBus
®
6300ESB ICH. It is to
3
Read-Only
16-bit
Core
3
Read/Write
8-bit
3
Read-Only
8-bit
Order Number: 300641-004US
Intel
®
6300ESB ICH—12
November 2007
Access
Access
Access
R/W
RO
RO
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