NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 333
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
Lead Free Status / RoHS Status
Compliant
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8—Intel
8.1.27
Table 207. Offset E1h: FDD/LPT_DEC—LPC I/F FDD and LPT Decode Ranges (LPC
November 2007
Order Number: 300641-004US
Bits
Default Value:
7:5
3:2
1:0
4
Lockable:
®
Device:
Offset:
6300ESB ICH
FDD Decode Range
LPT Decode Range
Offset E1h: FDD/LPT_DEC—LPC I/F FDD and LPT
Decode Ranges (LPC I/F—D31:F0)
I/F—D31:F0)
Reserved
Reserved
31
E1h
00h
No
Name
Reserved.
Determines which range to decode for the FDD Port
0 = 3F0h - 3F5h, 3F7h (Primary)
1 = 370h - 2FFh (Secondary)
Reserved.
This field determines which range to decode for the LPTPort.
00 = 378h - 37Fh and 778h - 77Fh
01 = 278h - 27Fh (port 279h is read only) and 678h - 67Fh
10 = 3BCh -3BEh and 7BCh - 7BEh
11 = Reserved
Power Well:
Description
Attribute:
Function:
Size:
0
Read/Write
8-bit
Core
Intel
®
6300ESB I/O Controller Hub
Access
R/W
R/W
333
DS
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