NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 673

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

18—Intel
18.6.1.23Offset 42: MTT—Multi-Transaction Timer
November 2007
Order Number: 300641-004US
04:0
01:0
07:0
02:0
Bits
Bits
02
3
0
3
0
Table 605. Offset 40: CNF—Intel® 6300ESB I/O Controller Hub Configuration
Table 606. Offset 42: MTT—Multi-Transaction Timer
Note: This register controls the amount of time that the Intel
tions (MDT)
Transaction
®
Policy (PP)
Device
Device
Maximum
Offset
Offset
Reserved
Transac-
Prefetch
Delayed
Delayed
6300ESB ICH
Name
Name
(DTD)
(MTC)
Depth
Count
Timer
Value
(Sheet 3 of 3)
a PCI initiator to perform multiple back-to-back transactions on the PCI-X bus. The
number of clocks programmed in the MTT represents the ensured time slice (measured
in PCI clocks) allotted to the current agent, after which the arbiter grants another agent
that is requesting the bus.
28
40
28
42
Controls how the Intel
behalf of PCI masters:
00: Allow prefetching on MRM, MRL, and MR.
01: Allow prefetching on MRM and MRL but not on a memory
read.
1x: Disable all prefetching.
Controls the Intel
number and size of the delayed transaction buffers:
When 0: 4 DTs at 1K for 33/66 MHz
When 1: 4 DTs at 1K for all frequencies
This bit is set by platform BIOS, based upon the PCI
frequency read from bits 8:6 of this register.
Controls the maximum number of delayed transactions the
Intel
00: 4 active, 4 pending 01: 1 active, 1 pending
10: 2 active, 2 pending 11: Reserved
This field specifies the amount of time that grant remains
asserted to a master continuously asserting its request for
multiple transfers. This field specifies the count in an 8-clock
(PCI clock) granularity.
Reserved.
®
6300ESB ICH is allowed to have:
®
6300ESB ICH behavior relative to the
®
Description
Description
6300ESB ICH prefetches data on
Attribute:
Attribute:
Function
Function
Size:
Size:
0
Read/Write
16-bit
0
Read/Write
8-bit
®
6300ESB ICH's arbiter allows
Intel
®
Reset
Value
Reset
Value
6300ESB I/O Controller Hub
00h
000
00
00
0
Access
Access
R/W
R/W
R/W
R/W
RO
673
DS