NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 289

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

7—Intel
7.1.3
Table 149. Offset 04 - 05h: CMD—Command Register (HUB-PCI—D30:F0)
November 2007
Order Number: 300641-004US
15:1
Bits
Default Value:
0
9
8
7
6
5
4
3
2
1
0
®
Fast Back to Back Enable
Device:
Invalidate Enable (MWE)
Offset:
I/O Space Enable (IOE)
6300ESB ICH
Memory Space Enable
Parity Error Response
Special Cycle Enable
VGA Palette Snoop
Wait Cycle Control
Memory Write and
Bus Master Enable
SERR# Enable
(SERR_EN)
Offset 04 - 05h: CMD—Command Register (HUB-
PCI—D30:F0)
Reserved
30
04-05h
0001h
Name
(BME)
(MSE)
(FBE)
(SCE)
Reserved.
Hardwired to’0’. The Intel
this capability.
0 = Disable.
1 = Enable the Intel
Hardwired to ‘0’
0 = The Intel
1 = The Intel
NOTE: The Hub Interface Parity Unsupported bit
Hardwired to ‘0’.
Hardwired to ‘0’.
Hardwired to ‘0’ by P2P Bridge spec.
0 = Disable
1 = Allows the Hub Interface-to-PCI bridge to accept cycles
NOTE: This bit does not affect the CF8h and CFCh I/O
NOTE: Cycles that generated from the Intel
The Intel
software only. However, the Intel
programming of this bit, and runs Hub Interface memory
cycles to PCI.
The Intel
software only. However, the Intel
programming of this bit and runs Hub Interface I/O cycles to
PCI that are not intended for USB, IDE, or AC’97.
SMI# if NMI routed to SMI#) when the D30:F0 SSE bit
(offset 06h, bit 14) is set.
Hub Interface.
detected on the Hub Interface.
from PCI to run on the Hub Interface.
(D30:F0:40h:bit20) must be cleared for the PER bit to
have any effect.
accesses.
Device 31 functionality are not blocked by clearing
this bit.
®
®
6300ESB ICH provides this bit as read/writable for
6300ESB ICH provides this bit as read/writable for
®
®
6300ESB ICH will ignore parity errors on the
6300ESB ICH is allowed to report parity errors
®
6300ESB ICH to generate an NMI (or
Description
®
Attribute:
Function:
6300ESB ICH does not support
Size:
®
®
6300ESB ICH ignores the
6300ESB ICH ignores the
0
Read/Write
16-bit
®
6300ESB ICH’s
Intel
®
6300ESB I/O Controller Hub
Access
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
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