NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 556

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

13.1.11 Offset 14 - 17h: NABMBAR—Native Audio Bus
Intel
DS
556
31:1
15:8
Bits
Default Value:
7:1
6
0
®
Table 469. Offset 10 - 13h: NAMBAR—Native Audio Mixer Base Address
6300ESB I/O Controller Hub
Lockable:
Note: The DMA registers for S/PDIF and Microphone In 2 cannot be addressed through this
Device:
Resource Type Indicator
Offset:
Base Address
Register (Audio—D31:F5)
Mastering
Base Address Register (Audio—D31:F5)
The Native PCI Mode Audio function uses PCI Base Address register 1 to request a
contiguous block of I/O space that is to be used for the Native Mode Audio software
interface. This BAR creates 64 bytes of I/O space to signify the base address of the bus
master I/O space.
address space. These DMA functions are only available from the new MBBAR register.
This register powers up as read only and only becomes writeable when the IOSE bit in
offset 41h is set.
Reserved
Reserved
31
10-13h
00000000h
No
Name
(RTE)
Reserved. All bits are hardwired to ‘0’.
These bits are used in the I/O space decode of the Native
Audio Mixer interface registers. The number of upper bits that
a device actually implements depends on how much of the
address space the device will respond to. For the AC‘97 mixer,
the upper 16 bits are hardwired to ‘0’, while bits 15:8 are
programmable. This configuration yields a maximum I/O
block size of 256 bytes for this base address.
Reserved. Read as ‘0’s.
This read-only bit defaults to ’0’ and flips to ’1’ if bit ’0’ of
offset 41h is set. When this bit is set to ‘1’, it indicates a
request for I/O space.
Power Well:
Description
Attribute:
Function:
Size:
5
Read/Write
32-bit
Core
Order Number: 300641-004US
Intel
®
6300ESB ICH—13
November 2007
Access
R/W
RO