NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 255

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5—Intel
Table 134. Read Cycle Format (Sheet 2 of 2)
Table 135. Data Values for Slave Read Registers (Sheet 1 of 2)
November 2007
Order Number: 300641-004US
®
6300ESB ICH
Registe
30-37
Bit
38
39
0
1
1
2
2
3
3
4
4
4
4
4
4
5
5
5
r
Data Byte
NOT ACK
Stop
7:0
2:0
7:3
3:0
7:4
5:0
7:6
6:4
Bit
s
0
1
2
3
7
0
1
2
Description
Reserved.
System Power State
000 = S0
001 = S1
010 = Reserved
011 = S3
100 = S4
101 = S5
110 = Reserved
111 = Reserved
Reserved
Frequency Strap Register
Reserved
Watchdog Timer current value
Reserved
1 = The Intruder Detect (INTRD_DET) bit is set. This indicates that the system
cover has probably been opened.
1 = BTI Temperature Event occurred. This bit will be set when the Intel
6300ESB ICH’s THRM# input signal is active. Need to take after polarity
control.
Boot-Status. This bit will be 1 when the processor does not fetch the first
instruction.
This bit will be set after the TCO timer times out a second time (Both TIMEOUT
and SECOND_TO_STS bits set).
Reserved.
The bit will reflect the state of the GPI[11]/SMBALERT# signal, and will depend
on the GP_INV[11] bit. It does not matter if the pin is configured as GPI[11] or
SMBALERT#.
NOTE: When the GP_INV[11] bit is 1 then the value of register 4 bit 7 will
NOTE: When the GP_INV[11] bit is 0 then the value of register 4 bit 7 will
Unprogrammed FWH bit. This bit will be 1 to indicate that the first BIOS fetch
returned FFh, which indicates that the FWH is probably blank.
Battery Low Status. ‘1’ when the BATLOW# pin is a ‘0’.
CPU Power Failure Status: ‘1’ when the CPUPWR_FLR bit in the
GEN_PMCON_2 register is set.
equal the level of the GPI[11]/SMBALERT# pin (high = 1, low = 0).
equal the inverse of the level of the GPI[11]/SMBALERT# pin (high = 1,
low = 0).
Intel
ICH
External
Microcontroller
External
Microcontroller
®
Driven by:
6300ESB
Description
Value depends on register being
accessed. See
Intel
®
Comment:
Table
6300ESB I/O Controller Hub
135.
®
255
DS