NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 149

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5—Intel
5.11.5
Table 65.
November 2007
Order Number: 300641-004US
®
6300ESB ICH
SMI#/SCI Generation
Upon any SMI# event, the Intel
which will cause it to enter SMM space. SMI# remains active until the EOS bit is set.
When the EOS bit (bit 1) is set, SMI# will go inactive for a minimum of four PCI clocks.
See
control register.
The SCI is a level-mode interrupt that is typically handled by an ACPI-aware operating
system. In non-APIC systems (which is the default), the SCI IRQ is routed to one of the
8259 interrupts (IRQ9, 10, or 11). The 8259 interrupt controller must be programmed
to level mode for that interrupt.
In systems using the APIC, the SCI may be routed to interrupts 9, 10, 11, 20, 21, 22,
or 23 The interrupt polarity changes depending on whether it is on an interrupt
shareable with a PIRQ or not. The interrupt will remain asserted until all SCI sources
are removed.
Table 32
SMI#. Note that some events may be programmed to cause either an SMI# or SCI. The
usage of the event for SCI (instead of SMI#) is typically associated with an ACPI-based
system.
Causes of TCO SCI are discussed in
Causes of SCI
ACPI Timer overflow (2.34 seconds)
NOTES:
1. SCI_EN must be 1 to enable SCI.
2. SCI may be routed to cause Interrupt 9:11 or 20:23 (20:23 only available in APIC mode).
Internal EHCI wake (PME_B0)
Section 8.8.3.9, “SMI_EN—SMI Control and Enable Register”
THRM# pin active (based on
BIOS_RLS written to 1
Power Button Press
shows which events may cause an SCI, and
TCO SCI Logic
WDT 1
USB #1 wakes
USB #2 wakes
USB #3 wakes
THRM#_POL)
Ring Indicate
AC’97 wakes
RTC Alarm
Any GPI
Cause
PME#
st
timeout
1,
2
®
6300ESB ICH will assert SMI# to the processor,
GPI[x]_Route = 10, GPE[x]_EN
Section 5.12.3, “TCO Theory of
WDT_INT_TYPE = “01”
Additional Enables
WDT_ENABLE = 1,
PWRBTN_EN = 1
PME_B0_EN = 1
TCOSCI_EN = 1
TMROF_EN = 1
THRM_EN = 1
USB1_EN = 1
USB2_EN = 1
USB3_EN = 1
AC97_EN = 1
PME_EN = 1
GBL_EN = 1
RTC_EN = 1
RI_EN = 1
= 1
Table 65
1
Intel
shows the causes of an
®
for details on the SMI
6300ESB I/O Controller Hub
Where Reported
Operation”.
PWRBTN_STS
WDTSCI_STS
PME_B0_STS
TCOSCI_STS
TMROF_STS
GPI[x]_STS
THRM_STS
USB1_STS
USB2_STS
USB3_STS
AC97_STS
PME_STS
GBL_STS
RTC_STS
RI_STS
149
DS