NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 53
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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2—Intel
Clock Domains
Table 2.
November 2007
Order Number: 300641-004US
Intel
Warning:This section is provided for background purposes and should not be
®
6300ESB ICH
considered by implementers and validators as part of the behavioral definition
of the Intel
Table 2
connection of the various system components, including the clock generator in desktop
systems. For complete details of the system clocking solution, refer to the system’s
clock generator component specification.
Intel
®
Interface
USB/SIO
Domain
USB2.0
Clock
AC’97
PCI-X
UART
SATA
OSC
Hub
RTC
PCI
®
6300ESB ICH and System
presents the Intel
6300ESB ICH Clock Domains
®
14.31818 M
12.288 MHz
Frequency
32.768 KHz
66.66 MHz
33.33 MHz
48.00 MHz
48.00 MHz
6300ESB ICH.
14.7456,
100 MHz
66 MHz
48 MHz
Hz
®
6300ESB ICH
discrete clock
6300ESB ICH clock domains.
AC’97 Codec
Main Clock
Main Clock
Main Clock
Main Clock
Main Clock
Main Clock
Generator
Generator
Generator
Generator
Generator
Generator
External
Internal
Source
and/or
circuit.
Intel
®
Hub Interface, CPU I/F, AGP. Shut off during S3 or
below.
The Intel
remains on during S0-S1 states, and may be shut
off during S3-S5. The PCI clock to peripherals
may be shut off using the CLKRUN# protocols.
USB 1.0 Controllers in the Intel
External Super I/O. Shut off in S3 or below.
USB 2.0 logic close to the pins. Shut off when the
48 MHz clock input is shut off (S1 for low power,
as well as S3 or below)
Used by ACPI timer. Also used by the Multimedia
Timers Logic. Shut off in S1 for low power, as well
as S3 or below.
AC’97 Link. Generated by AC’97 CODEC. May be
shut off by codec in D3, as well as S1 for low
power, and S3 or below.
RTC, Power Management. The Intel
ICH has its own oscillator.
Always running, even in G3 state.
UART clock input.
NOTE: Some clock chips provide a 14.318x MHz
1.5 GHz clock generated internal to the Intel
6300ESB ICH for use by SATA phy.
clock output. The Intel
UART clock must use a 14.7456 MHz
frequency; most clock chips do not
provide this frequency. An option will be to
use the 48.0 MHz clock.
®
6300ESB ICH, PCI, LPC I/F. This
Figure 4
Intel
Usage
®
6300ESB I/O Controller Hub
shows the assumed
®
®
6300ESB ICH’s
6300ESB ICH,
®
6300ESB
®
2
DS
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