NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 534

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Table 439. SMB I/O Registers (Sheet 2 of 2)
12.2.1
Intel
DS
534
®
6300ESB I/O Controller Hub
Note: All status bits are set by hardware and cleared by the software writing a ‘1’ to the
Offset 00h: HST_STS—Host Status Register
particular bit position. Writing a ‘0’ to any bit position has no effect.
Offset
0Eh
0Fh
10h
11h
14h
16h
17h
SMLINK_PIN_CTL
SMBUS_PIN_CTL
NOTIFY_DADDR
NOTIFY_DHIGH
NOTIFY_DLOW
Mnemonic
SLV_CMD
SLV_STS
SMLink Pin Control
SMBus Pin Control
Slave Status
Slave Command
Notify Device Address
Notify Data Low Byte
Notify Data High Byte
Register Name/Function
See register
See register
description
description
Default
00h
00h
00h
00h
00h
Order Number: 300641-004US
Intel
Access
®
R/WC
R/W
R/W
R/W
RO
RO
RO
6300ESB ICH—12
November 2007