NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 757

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

20—Intel
20.1.28 Offset 80 - 81h: MID—Message Signaled Interrupt
20.1.29 Offset 82 - 83h: MC—Message Signaled Interrupt
November 2007
Order Number: 300641-004US
15:8
15:8
Bits
Bits
Default Value:
Default Value:
7:0
6:4
3:1
7
0
Table 687. Offset 80 - 81h: MID—Message Signaled Interrupt Identifiers
Table 688. Offset 82 - 83h: MC—Message Signaled Interrupt Message Control
Device:
Device:
Multiple Message Enable
®
Offset:
Offset:
64 Bit Address Capable
6300ESB ICH
Next Pointer (NEXT)
Capability ID (CID)
MSI Enable (MSIE)
Multiple Message
Capable (MMC)
Identifiers (SATA–D31:F2)
(SATA–D31:F2)
Message Control (SATA–D31:F2)
(SATA–D31:F2)
Reserved
31
80-81h
7005h
Name
31
82-83h
0000h
Name
(MME)
(C64)
Indicates that the next item in the list the PCI power
management pointer.
Capability ID indicates MSI.
Reserved.
Capable of generating 32-bit message only.
These bits are R/W for software compatibility, but only one
message is ever sent by the Intel
Only one message is required.
0 = Disabled.
1 = MSI is enabled and traditional interrupt pins are not used
to generate interrupts.
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
®
6300ESB ICH.
2
Read-Only
16-bit
2
Read-Only, Read/Write
16-bit
Intel
®
6300ESB I/O Controller Hub
Access
Access
R/W
R/W
RO
RO
757
DS