MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 103

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Freescale Semiconductor
IRQ0 / SGPIOC0 / MDO4
IRQ1 / RSV / SGPIOC1
IRQ2 / CR / SGPIOC2 /
MTS
IRQ3 / KR / RETRY /
SGPIOC3
2
Signal Name
Table 2-1. MPC561/MPC563 Signal Descriptions (continued)
Signals
No. of
1
1
1
1
MPC561/MPC563 Reference Manual, Rev. 1.2
Type
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
MDO4 if the
Nexus (READI)
port is enabled,
IRQ0 otherwise.
See
IRQ2
IRQ3
Function after
Interrupt Controller
Section
Reset
IRQ1
1
2.5.
Interrupt Request 0. One of the eight external signals that
can request, by means of the internal interrupt controller, a
service routine from the RCPU. IRQ0 is a non-maskable
interrupt (NMI).
Port SGPIOC0. Allows the signal to be used as a
general-purpose input/output.
READI Message Data Out. Message data out (MDO4) are
output signals used for uploading OTM, BTM, DTM, and
read/write accesses. External latching of MDO occurs on
rising edge of MCKO. Eight signals are implemented.
Interrupt Request 1. One of the eight external signals that
can request, by means of the internal interrupt controller, a
service routine from the RCPU.
Reservation. This signal is used, together with the address
bus, to indicate that the internal core initiated a transfer as a
result of a STWCX or a LWARX instruction.
Port SGPIOC1. Allows the signal to be used as a
general-purpose input/output.
Interrupt Request 2. One of the eight external signals that
can request, by means of the internal interrupt controller, a
service routine from the RCPU.
Cancel Reservation. Instructs the MPC561/MPC563 to
clear its reservation because some other master has
touched its reserved space. An external bus snooper
asserts this signal.
Port SGPIOC2. Allows the signal to be used as a
general-purpose input/output.
Memory Transfer Start. This is the transfer start signal from
the MPC561’s memory controller that allows external
memory access by an external bus master.
Interrupt Request 3. One of the eight external signals that
can request, by means of the internal interrupt controller, a
service routine from the RCPU.
Kill Reservation. In case of a bus cycle initiated by a STWCX
instruction issued by the RCPU core to a non-local bus on
which the storage reservation has been lost, this signal is
used by the non-local bus interface to back-off the cycle.
Retry. Indicates to a master that the cycle is terminated but
should be repeated. As an input, it is driven by the external
slave to retry a cycle.
Port SGPIOC3. Allows the signal to be used as a
general-purpose input/output.
Description
Signal Descriptions
2-5