MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 74

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

A-2
A-3
A-4
B-1
B-2
B-3
B-4
B-5
B-6
B-7
B-8
B-9
B-10
B-11
B-12
B-13
B-14
B-15
B-16
B-17
B-18
C-1
C-2
D-1
D-2
D-3
D-4
E-1
E-2
F-1
F-2
F-3
F-4
F-5
F-6
F-7
F-8
F-9
F-10
Freescale Semiconductor
Table
Number
ISCT_SER Bit Descriptions .................................................................................................. A-18
DCCR0-DCCR15 Field Descriptions .................................................................................... A-20
Instruction Layout Encoding ................................................................................................. A-21
SPR (Special Purpose Registers) ..............................................................................................B-2
UC3F Flash Array.....................................................................................................................B-4
DECRAM SRAM Array...........................................................................................................B-4
BBC (Burst Buffer Controller Module)....................................................................................B-4
USIU (Unified System Interface Unit) .....................................................................................B-5
CDR3 Flash Control Registers EEPROM (UC3F)...................................................................B-9
DPTRAM Control Registers...................................................................................................B-10
DPTRAM Memory Arrays .....................................................................................................B-10
Time Processor Unit 3 A and B (TPU3 A and B) ..................................................................B-10
QADC64E A and B (Queued Analog-to-Digital Converter)..................................................B-14
QSMCM (Queued Serial Multi-Channel Module) .................................................................B-16
Peripheral Pin Multiplexing (PPM) Module...........................................................................B-17
MIOS14 (Modular Input/Output Subsystem) .........................................................................B-18
TouCAN A, B and C (CAN 2.0B Controller) ........................................................................B-26
UIMB (U-Bus to IMB Bus Interface).....................................................................................B-31
CALRAM Control Registers ..................................................................................................B-31
CALRAM Array .....................................................................................................................B-32
READI Module Registers .......................................................................................................B-32
External Components Value For Different Crystals (Q1) ........................................................C-4
IRAMSTBY Regulator Operating Specifications ....................................................................C-8
Bank 0 and Bank 1 Functions .................................................................................................. D-2
QOM Bit Encoding .................................................................................................................. D-5
SIOP Function Valid CHAN_Control Options ..................................................................... D-56
SIOP State Timing ................................................................................................................. D-58
Memory Access Times Using Different Buses.........................................................................E-1
Instruction Timing Examples for Different Buses....................................................................E-2
Absolute Maximum Ratings (VSS = 0V) ................................................................................. F-1
Thermal Characteristics ............................................................................................................ F-3
ESD Protection ......................................................................................................................... F-6
DC Electrical Characteristics.................................................................................................... F-7
Oscillator and PLL.................................................................................................................. F-11
Array Program and Erase Characteristics ............................................................................... F-12
CENSOR Cell Program and Erase Characteristics................................................................. F-12
Flash Module Life................................................................................................................... F-12
Power Supply Pin Groups....................................................................................................... F-13
Bus Operation Timing ............................................................................................................ F-20
MPC561/MPC563 Reference Manual, Rev. 1.2
Tables
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