MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 115

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Freescale Semiconductor
MPIO32B0 / VF0 / MDO1
MPIO32B1 / VF1 / MCKO
MPIO32B2 / VF2 / MSEI
Signal Name
Table 2-1. MPC561/MPC563 Signal Descriptions (continued)
Signals
No. of
1
1
1
MPC561/MPC563 Reference Manual, Rev. 1.2
Type
I/O
I/O
I/O
O
O
O
O
O
I
MPIO32B0
unless the
Nexus (READI)
port is enabled,
then MDO1.
See
MPIO32B1
unless the
Nexus (READI)
port is enabled,
then
MCKO.
See
MPIO32B2
unless the
Nexus (READI)
port is enabled,
then MSEI.
See
Function after
Section
Section
Section
Reset
1
2.5.
2.5.
2.5.
MIOS14 GPIO 0. Allows the signals to be used as
general-purpose inputs/outputs.
Visible Instruction Queue Flush Status 0. These signals
output by the MPC561/MPC563 when program instruction
flow tracking is required. VF reports the number of
instructions flushed from the instruction queue in the
internal core. VF signals are also multiplexed with the
development and debug signals VF0 / LWP1 / BG, VF1 /
IWP2 / BR, and VF2 / IWP3 / BB.
READI Message Data Out. Message data out (MDO1) is an
output signal used for uploading OTM, BTM, DTM, and
read/write accesses. External latching of MDO occurs on
rising edge of MCKO. Eight MDO signals are implemented.
MIOS14 GPIO 1. Allows the signals to be used as
general-purpose inputs/outputs.
Visible Instruction Queue Flush Status 1. These signals
output by the MPC561/MPC563 when program instruction
flow tracking is required. VF reports the number of
instructions flushed from the instruction queue in the
internal core. VF signals are also multiplexed with the
development and debug signals VF0 / LWP1 / BG, VF1 /
IWP2 / BR, and VF2 / IWP3 / BB.
MCKO. Message clock-out (MCKO) is a free-running output
clock to development tools for timing of MDO and MSEO
signal functions. MCKO is the same as the
MPC561/MPC563 system clock.
MIOS14 GPIO 2. Allows the signals to be used as
general-purpose inputs/outputs.
Visible Instruction Queue Flush Status 2. These signals
output by the MPC561/MPC563 when program instruction
flow tracking is required. VF reports the number of
instructions flushed from the instruction queue in the
internal core. VF signals are also multiplexed with the
development and debug signals VF0 / LWP1 / BG, VF1 /
IWP2 / BR, and VF2 / IWP3 / BB.
MSEI. Message Start/End Input. The MSEI input is a Nexus
input signal that indicates when a message on the MDI
signals has started, when a variable length packet has
ended, and when the message has ended. Internal latching
of MSEI occurs on rising edge of MCKI.
Description
Signal Descriptions
2-17