MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 452

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC561MZP56
Manufacturer:
FREESCALE
Quantity:
852
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC561MZP56
Manufacturer:
FREESCALE
Quantity:
852
Company:
Part Number:
MPC561MZP56
Quantity:
13
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
L-Bus to U-Bus Interface (L2U)
11.8.6
The L2U global region attribute register (L2U_GRA) defines the protection attributes associated with the
memory region which is not protected under the four DMPU regions. This register also provides
enable/disable control for the four DMPU regions.
11-16
20:21
22:24
26:31
Bits
Bits
25
Reset
Reset
0
1
2
Field ENR0 ENR1 ENR2 ENR3
Field
Addr
Global Region Attribute Register (L2U_GRA)
MSB
16
Name
Name
ENR0
ENR1
ENR2
0
PP
G
17
1
Figure 11-7. L2U Global Region Attribute Register (L2U_GRA)
Protection bits
00 No supervisor access, no user access
01 Supervisor read/write access, no user access
10 Supervisor read/write access, user read-only access
11 Supervisor read/write access, user read/write access
Reserved
Guarded attribute
0 Not guarded from speculative accesses
1 Guarded from speculative accesses
Reserved
Enable attribute for region 0
0 Region attribute is off
1 Region attribute is on
Enable attribute for region 1
0 Region attribute is off
1 Region attribute is on
Enable attribute for region 2
0 Region attribute is off
1 Region attribute is on
18
2
Table 11-9. L2U_RAx Bit Descriptions (continued)
19
3
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 11-10. L2U_GRA Bit Descriptions
20
4
PP
21
5
0000_0000_0000_0000
0000_0000_0000_0000
22
6
SPR 536
23
7
Description
Description
24
8
25
G
9
10
26
11
27
12
28
Freescale Semiconductor
13
29
14
30
LSB
15
31

Related parts for MPC561MZP56