MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 249

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

If programmed to generate an interrupt, the SWT and external pin IRQ0 always generate an NMI,
non-maskable interrupt to the RCPU.
Freescale Semiconductor
Levels[0:7]
ilbs[0:1]
IRQ[0:7]
IMB3
The RCPU takes the system reset exception when an NMI is asserted, the
external interrupt exception for any other asserted interrupt request, and the
decrementer exception when the decrementer MSB changes from 0 to 1.
UIMB
Figure 6-3. MPC561/MPC563 Interrupt Structure
U-bus INT Levels [0:7]
[EICEN, LPMASKEN]
MPC561/MPC563 Reference Manual, Rev. 1.2
EDGE
DET
Change
of Lock
SIUMCR
Timers,
Sequencer
IMBIRQ
LPMASKEN
NOTE
Level 7
Level 6
Level 4
Level 3
Level 2
Level 1
Level 0
Level5
SWT
DEC
I7
I6
I5
I4
I3
I2
I1
I0
I0
Internal
GEN
Bus
NMI
16
48
DEC_IRQ to RCPU
Wake up from
low-power mode
NMI to RCPU
System Configuration and Protection
MUX
USIU
EICEN
Offset in
branch table
IREQ to RCPU
IRQOUT
6
BBC/IMPU
6-9