MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 633

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Serial transfers of eight to 16 bits can be specified. Programmable transfer length simplifies interfacing to
devices that require different data lengths.
An inter-transfer delay of approximately 0.8 to 204 µs (using a 40-MHz IMB3 clock) can be programmed.
The default delay is 17 clocks (0.425 µs at 40 MHz). Programmable delay simplifies the interface to
devices that require different delays between transfers.
Freescale Semiconductor
Queue Control
Programmable
Comparator
Logic Array
End Queue
Register
Registers
Counter
Control
Pointer
Control
Delay
Pointer
Status
Block
Queue
Logic
4
Done
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 15-10. QSPI Block Diagram
4
4
4
Chip Select
G
A
D
D
R
E
S
S
R
E
S
T
E
R
I
Command
MSB
8/16-bit Shift Register
Rx / Tx Data Register
Rx Data
QSPI RAM
160-Byte
2
Tx Data
LSB
Baud Rate
Generator
Queued Serial Multi-Channel Module
M
M
S
S
QSPI Block
MOSI
MISO
PCS0/SS
PCS[2:1]
SCK
15-15