MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 863

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Chapter 21
CDR3 Flash (UC3F) EEPROM
The MPC563 U-bus CDR3 (UC3F) EEPROM module is designed for use in embedded microcontroller
(MCU) applications targeted for high-speed read performance and high-density byte count requirements.
The MPC563 has one Flash module of 512 Kbytes but the MPC561 has no internal Flash; this chapter,
therefore, applies only to the MPC563. The UC3F array uses a single transistor Flash bit cell and is
configured for a module of 512 Kbytes (524,288 bytes) of non-volatile memory (NVM). The UC3F
module is divided into eight 64-Kbyte (65,536-byte) array blocks. Two blocks of the UC3F module
memory map may be subdivided into two smaller blocks: a 48-Kbyte (49,152-byte) block and a 16-Kbyte
(16,384-byte) block, or a 16-Kbyte block and a 48-Kbyte block.
The primary function of the UC3F EEPROM module is to serve as electrically programmable and erasable
NVM to store program instructions and/or data. It is a class of non-volatile solid state silicon memory
device consisting of an array of isolated elements, an electrical means for selectively adding and removing
charge to the elements, and a means of selectively sensing the stored charge in the elements. When power
is removed from the device, the stored charge of the isolated elements will be retained.
The UC3F EEPROM module is arranged into two major sections as shown in
is the UC3F array used to store system program and data. The second section is the memory interface (MI)
that controls operation of the UC3F array. The MI also serves as the interface between the UC3F array and
a bus interface unit (BIU) which connects the UC3F array to the U-bus.
Freescale Semiconductor
If the Flash arrays are disabled in the IMMR register (FLEN=0), then
neither the UC3F array or the UC3F control registers are accessible.
MPC561/MPC563 Reference Manual, Rev. 1.2
NOTE
Figure
21-1. The first section
21-1

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