MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 873
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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21.2.1.4
The UC3F EEPROM high voltage control register is used to control the program and erase operations of
the UC3F EEPROM module.
Freescale Semiconductor
1 Value is set by the current status of the EPEE pin.
2 Value is set by the current status of the B0EPEE pin.
HRESET
HRESET
21:22
23:31
Bits
Bits
Field HVS PEGOOD PEFI EPEE B0EM
Field
Addr
0
MSB
16
0
FLASHID
0
UC3F EEPROM High Voltage Control Register (UC3FCTL)
SBLKL
Name
Name
HVS
Figure 21-4. UC3F EEPROM High Voltage Control Register (UC3FCTL)
17
1
0
High voltage status. The HVS bit is for status only, and writes to HVS have no effect. During a
program or erase operation, HVS is set (HVS = 1) to indicate when high voltage operations are
in progress. The HVS bit will negate itself when the program or erase operation completes
successfully, EHV negates during program or erase to terminate the program/erase operation,
HSUS is asserted to suspend the program/erase operation, resetting the module, or the internal
hardware program/erase controller times out.
0 no program or erase of the UC3F array or shadow information or CENSOR bits in progress
1 program or erase of the UC3F array or shadow information or CENSOR bits in progress
Small block location code. There are three possible locations for the small blocks: 1) a small
block may be placed in the lowest numbered host block and the highest numbered host blocks,
2) a small block may be placed in the lowest numbered host block and the second lowest
numbered host block, and 3) a small block may be placed in the second highest numbered host
block and the highest numbered host block.
00 unused
01 small blocks are part of the two highest numbered blocks of the UC3F array
10 small blocks are part of the two lowest numbered blocks of the UC3F array
11 small blocks are part of the lowest and highest numbered blocks of the UC3F array
Flash module identification code. The FLASHID value is assigned by Freescale and used
internally for tracking purposes. The FLASHID field is read only and writes have no effect.
Table 21-4. UC3FMCRE Bit Descriptions (continued)
18
0
2
BLOCK
X
19
MPC561/MPC563 Reference Manual, Rev. 1.2
3
1
Table 21-5. UC3FCTL Bit Descriptions
X
20
4
2
21
5
0000_0000_0000_0000
22
6
0x2F C808
23
7
Description
Description
—
24
8
CSC
000_0000_0000
25
9
—
10
26
—
11
27
HSUS
CDR3 Flash (UC3F) EEPROM
12
28
PE
13
29
SES EHV
SBBLOCK
14
30
LSB
15
31
21-11
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